altdpram Intel FPGA IP

Parameterized dual-port RAM Intel^® FPGA IP. The altdpram Intel^® FPGA IP can be used to implement the memory logic array block (MLAB), as well as the standard memory block types, in Stratix^® devices. Intel recommends instantiating this function with the IP Catalog. The altdpram Intel^® FPGA IP is available for all supported Intel devices.

Note:

The IP Catalog calls altdpram only when the read address is asynchronous.
The Intel^® Quartus^® Prime Compiler automatically implements this function in logic cells in MAX series devices. The altdpram function uses DFFE primitives or latch arrays in the MAXdevices.
You can use the Assignment Editor to add, change, or delete assignments and assignment values for Intel^® FPGA IP.

Note: More information is available on the RAM Intel^® FPGA IP on the Altera website.