| Quartus Prime Standard Edition Support for SystemVerilog | |
IEEE Subsection |
Construct |
Description |
|---|---|---|
12.4-12.5 |
Selection statement |
Supported (unique/priority supported only on case statements) |
12.6 |
Pattern matching |
Not supported |
12.7 |
Loop statements |
Supported |
12.8 |
Jump statements |
Supported |