altclklock Megafunction

ParameterizedPhase-Locked Loop (PLL) Definition megafunction. The altclklock megafunction enables ClockLock PLL circuitry. The phase-locked loop is used to synthesize a clock signal that is based on a reference clock. The altclklock megafunction can reduce clock delay and skew, and can be used to generate internal clocks that operate at frequencies that are multiples of the frequency of the system clock.

The altclklock megafunction can also improve setup and hold times.

The altclklock megafunction is available for all Altera device families supported by the Quartus® Prime Standard Edition software except the MAX series family devices.

Use the altpll megafunction to take advantage of the Cyclone and Stratix series PLL features.

Altera recommends instantiating this function with the IP Catalog.

Note: When you create your megafunction, you can use the IP Catalog to generate a netlist for third-party synthesis tools.