| More EDA Netlist Writer Settings Dialog Box | |
Directs the EDA Netlist Writer to flatten all buses when creating VHDL Output File (.vho) Definition. You should turn on this option if your EDA tool does not support buses. You can control individual bits in your simulation test-bench by flattening the buses in your netlist.
Scripting
Information |
Keyword:eda_flatten_buses Settings:on | off *default |